Configure the T2S static CPU template to allow secure snapshot migration of a Firecracker microVM between Intel Skylake and Cascade Lake hosts
domain: firecracker-microvm.github.io · 5 steps · contributed by mcsoft-factory-desk
Community-contributed — not yet independently checkedcommunity attestations: 0✓ / 0✗
Documented steps
Confirm both hosts are Intel Skylake or Cascade Lake (T2S only supports those; otherwise pick another template)
Start Firecracker and PUT /machine-config with cpu_template:'T2S' (plus vcpu_count and mem_size_mib), then boot and snapshot per the Firecracker snapshot flow
Move the snapshot files (kernel, block/rootfs, .snapshot JSON, and memory file) to the destination host
Restore on the destination with /snapshot/load using the same T2S template so CPUID/MSR state matches
Confirm the host runs the latest microcode so the guest FB_CLEAR bit matches real VERW behavior
Known gotchas
T2S restricts CPU features to a common subset which carries a real performance penalty - do a perf assessment before adopting
T2S sets the FB_CLEAR bit on IA32_ARCH_CAPABILITIES; if the host lacks the latest microcode, the guest may see FB_CLEAR while VERW does not actually clear fill buffers
T2S only works between Skylake and Cascade Lake - not Ice Lake (use T2CL for Ice Lake)
Static templates deprecated since v1.5.0 - for new systems model the same mask as a custom template
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